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Silicon Austria Labs (SAL)

Senior Scien­tist for RFIC Design for PLL/​frequency Synthe­si­zers

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(F/​M/D)
SCIENCE PARK 4, ALTEN­BERGER STRASSE 69, 4040
LINZ, AUSTRIA

Silicon Austria Labs is performing cutting-edge research in the course of the 6G Lighthouse on the physical layer of RF systems for future 5G/-6G (UE, front and backhaul), and millimeter-wave and sub- Terahertz imaging/-sensing/-radar applications. In this domain, the Research Unit for Millimeter Wave Technologies collaborates closely with university and leading industry partners on e.g. RF/ millimeter-wave transceiver architectures robust in terms of interference and coexistence, reconfigurable RF systems for transceivers and RF/-millimeter-wave front-end modules (architectural reuse and/ or resource sharing), and large-scale phased-array antennas and beamforming structures, which are targeting millimeter-wave and sub-Terahertz communications (5G, 6G), radars and imagers. In support of the design activities the mmWave RF Unit is equipped with the best in-class test infrastructure covering the GHz and THz frequency range.

YOUR FUTURE RESPONSIBILITIES

  • System and circuit solu­tions for multi-gigabit wire­less chips
  • Frequency synthe­sizer/​PLL high resolution sensing and/ or archi­tec­ture selec­tion
  • Imple­men­ting blocks and docu­men­ting design towards formal design reviews
  • Drive layout and top-level simu­la­tions to vali­date top-level inte­gra­tion
  • Take lab measu­re­ments to vali­date analog designs
  • Supervision of Junior Scientists
  • Project Responsibilities

YOUR PROFILE

  • Solid expe­ri­ence in
    • PLL or clock/​frequency gene­ra­tion design 
    • Under­stan­ding of RF/​high-speed (10GHz+) issues 
    • Perfor­ming analog custom layout
    • Phase noise/​jitter, BW & power consump­tion design  trade-offs
  • High proficiency in system specification & ability to trans­late system into circuit requi­re­ments at IC level
  • Deep under­stan­ding of funda­men­tals, inclu­ding
    • Detailed tran­sistor level design 
    • Control/​feed­back loop stabi­lity analysis 
    • Device physics is a plus
  • Design expe­ri­ence in advanced CMOS nodes (FD-SOI, FinFET, bulk) is a plus
  • Insights into packa­ging effects, supply isola­tions, high frequency ESD struc­tures & circuit layout for optimum perfor­mance 
  • Expe­ri­ence in simu­la­tion and design of lumped & distri­buted passive struc­tures
  • Proficient with EDA CAD tools (Cadence, Mentor, Ansys, etc.)
  • Project experience in using advanced CMOS nodes (FDSOI and FinFET is a plus) and/or SiGe
  • Proven expe­ri­ence in measu­ring IC perfor­mance and debug of design to corre­late simu­la­tions to measu­re­ments
  • Masters degree with 5+ years in related area of exper­tise or PhD with 2 years of expe­ri­ence

IMPORTANT FACTS

  • Begin­ning of the employ­ment: as soon as possible
  • This posi­tion is endowed with a gross annual salary of € 53,382 based on the collec­tive agree­ment for re­search („Forschungs-Kollek­tiv­ver­trag“) and depen­ding on your expe­ri­ence and skillss

BECOME PART OF SILICON AUSTRIA LABS

The top research center for electronic based systems (EBS).

Unfold the future, unfold yourself.

Job details

Title
Senior Scien­tist for RFIC Design for PLL/​frequency Synthe­si­zers
Location
Linz Linz, Austria
Published
2021-08-25
Job type
Save as a favourite Create job alert

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About the employer

In the network of science and industry, we carry out re­search at the highest global re­search level.

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