ETH Zürich

PhD Position on “Secure Machine Learning on RISC-V Servers and Accelerators”

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ETH Zürich is well known for its excellent education, ground-breaking fundamental research and for implementing its results directly into practice.

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PhD Position on “Secure Machine Learning on RISC-V Servers and Accelerators”

The Digital Circuits and Systems Group is a research group in the Department of Information Technology and Electrical Engineering (D-ITET) at ETH Zürich led by Prof. Luca Benini.

The focus of the group is energy efficient design of digital circuits and systems, from smart wearable devices with a power budget of less than a mW, all the way to High Performance Computing (HPC) and cloud AI systems that consume power in the MWs. The explosion in complexity of workloads such as foundation models of generative AI, coupled with limitations in available energy for mobile devices, maximum power density in tightly integrated circuits, and the significant costs associated with running and cooling data centers, all require hardware and software solutions to achieve more computations with the available energy than ever before.

The group covers all aspects of digital system design, from technological aspects, circuit and architecture design, demonstrators for various applications, all the way to how these new systems can be programmed. Open hardware and software are emphasized, with a specific focus on RISC-V: the group has developed and maintains PULP, a world-leading open-source computing platform ( Application fields include digital twins, AI-based assistants, extended reality, environmental and structural monitoring, wearables, autonomous vehicles, telecommunication infrastructure, and high-performance computing.

In this context, the Digital Circuits and Systems Group invites applications for one PhD position focusing on the deployment and optimization of foundation models for multimodal AI on secure RISC-V servers and hardware accelerators, toward the goal of co-designing future open RISC-V based AI-factories.

Project background

Foundation models have emerged as a transformative approach in AI, enabling a wide range of applications, from natural language processing to computer vision and beyond. However, to effectively exploit their capabilities, platform specific optimizations and a secure, multi-tenant computing environment is required.

In this context, the research group is exploring the development of foundation models and large-scale transformers across different scales: high-range platforms (commercial RISC-V machines, capable of handling models in the order of 10B parameters), mid-range platforms (featuring thousands of computing engines, suited for models in the order of 1B parameters), low-range platforms (operating in the ultra-low-power domain and fitting models in the order of 10M parameters).

The successful implementation of such models is necessarily tied to a deep understanding of the system architecture, both from the hardware and the software point of view across the whole stack (e.g., compilers, low-level programming, …).

Successful candidates should have

  • Solid working knowledge of software tools and environments for application deployment, optimization, and performance analysis
  • Background in modern machine learning models, such as transformers, and some practical experience on the software stacks for training and inference
  • Familiarity with computer architecture and parallel programming

The PhD student will work with RISC-V computing systems, commercial products as well as research prototypes. Experience with computer security and/or RISC-V hardware and software is desirable but not strictly required.

Job description

  • You will be developing a platform for the secure deployment of Machine Learning inference tasks on multi-tenant machines. An example of security-critical application is running a foundation model for biosignal analysis (e.g., EEG signals) for different users, ensuring confidentiality for each user
  • You will be optimizing secure ML task execution for RISC-V hardware platforms, addressing these open research challenges:
    • Energy Efficiency Optimization: Enhancing the energy efficiency of ML algorithms to ensure they can operate within the stringent power budgets of devices ranging from low-power IoT sensors to high-power data centers
    • Performance Scaling: Scaling the performance of ML tasks across a wide operating range, ensuring optimal utilization of available computing resources in both low-power (limited number of cores) and high-performance scenarios (many cores platforms)
    • Hardware Acceleration: Leveraging hardware accelerators to improve the speed and efficiency of ML tasks, including custom RISC-V extensions and co-processor design, or drivers for already designed accelerators
    • Encryption and decryption of user data and user-specific privacy-preserving fine-tuning of models
    • Algorithm-Hardware Co-Design: Working closely with circuit and system designers to influence the architectural decisions of future RISC-V platforms, ensuring that the hardware is optimized for advanced ML applications
  • You will be collaborating with colleagues from the high-level Machine Learning domain and digital-design domain
  • You will be responsible for project meetings, reporting, scientific publications, and conference/seminar presentations
  • You will supervise master/bachelor students
  • You will be involved in teaching activities

Your profile

  • MS in Electrical Engineering, Computer Science, or related field with a good background in computer architecture
  • Proven skills in software profiling and optimization for target platforms with familiarity with Machine Learning workloads
  • Exposure to the design and deployment of Machine Learning inference tasks on servers and hardware accelerators
  • Understanding of the basic concepts of computer security
  • Some familiarity with RISC-V –based platforms
  • We are looking for good team players, with excellent English written and verbal communication skills.
  • Research and publication track record in RISC-V-based digital design is a plus
  • Research and publication track record in Machine Learning for embedded systems is a plus

We offer

At the Digital Circuits and Systems Group, we value knowledge exchange and collaborative working environment as a highly interdisciplinary and international research team. We provide a wide variety of training opportunities at the cutting edge of digital circuits and systems research.

Working, teaching and research at ETH Zurich

We value diversity

In line with our values, ETH Zurich encourages an inclusive culture. We promote equality of opportunity, value diversity and nurture a working and learning environment in which the rights and dignity of all our staff and students are respected. Visit our Equal Opportunities and Diversity website to find out how we ensure a fair and open environment that allows everyone to grow and flourish.

Curious? So are we.

We look forward to receiving your online application with the following documents:

  • CV with named referenced
  • Transcripts, publication list and/or list of achievements
  • Motivation letter

Please note that we exclusively accept applications submitted through our online application portal. Applications via email or postal services will not be considered.

Further information about The Digital Circuits and Systems Group can be found on our website. For further information about the position, please contact Dr. Andrea Cossettini ( and Dr. Yawei Li (

About ETH Zürich

ETH Zurich is one of the world’s leading universities specialising in science and technology. We are renowned for our excellent education, cutting-edge fundamental research and direct transfer of new knowledge into society. Over 30,000 people from more than 120 countries find our university to be a place that promotes independent thinking and an environment that inspires excellence. Located in the heart of Europe, yet forging connections all over the world, we work together to develop solutions for the global challenges of today and tomorrow.

Job details

PhD Position on “Secure Machine Learning on RISC-V Servers and Accelerators”
Rämistrasse 101 Zurich, Switzerland
Application deadline
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About the employer

ETH Zürich is well known for its excellent education, ground-breaking fundamental research and for implementing its results directly into practice.

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