Aix-Marseille Université

Three-year PhD position in Design and test of ReRAM technology assessment chips

2024-04-01 (Europe/Paris)
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RESEARCHER PROFILE: PhD / R1: First stage Researcher                 
RESEARCH FIELD(S)1: Microelectronics 
MAIN SUB RESEARCH FIELD OR DISCIPLINES1: Integrated circuit design for eNVM

JOB /OFFER DESCRIPTION
Exciting developments are taking place in the world of semiconductor technology! Leading players in the industry, including TSMC and GF, are pushing for the integration of emerging non-volatile memories (NVM) into production. To ensure European semiconductor companies are at the forefront of this cutting-edge technology, we need to gain a comprehensive understanding of the underlying physical mechanisms driving these emerging NVM devices. This endeavor is made possible through the support of the IPCEI program (https://www.ipcei-me.eu/), a European initiative aimed at developing European semiconductor leadership.

PhD Thesis Project:

As part of the IPCEI program, in close collaboration with the R&D teams at STMicroelectronics, the PhD student will spearhead the architecture definition of a ReRAM technology assessment chip. This chip's architecture will target the memory array definition, including the bitcell, as well as the peripheral circuitry required for various access modes. The student will ensure that the chip enables comprehensive characterization procedures, encompassing static and dynamic I-V measurements, direct memory access, and testing with different memory word lengths. The objective is to accurately mimic real-world conditions, capturing parallel access time and power consumption. Moreover, the student will delve into more complex functionalities by integrating built-in self-test procedures, leveraging a dedicated digital scheduler. Excitingly, the project will explore innovative ReRAM techniques, such as the Write Termination1 protocol.

Building upon the architecture definition, the PhD student will design two generations of the test assessment chip, utilizing a 90nm CMOS platform and employing a mixed-signal IC design methodology. These circuits will be fabricated by our partner STMicroelectronics.

To effectively test and characterize the fabricated chip, the student will develop a test board on a printed circuit board (PCB), incorporating a microcontroller or FPGA for generating and acquiring digital signals. Accompanied by state-of-the-art characterization tools like the Keysight B1530, which handles analog signals, the test board will be operated using test procedures developed in Python.

Main Project Goal:

This ambitious project presents a unique opportunity to engage in mixed-signal, analog, and digital CMOS design. The specifics of the project can be tailored to the student's specialization and interests. It encompasses full-custom ASIC design using industry-standard Cadence design tools, as well as HDLbased digital design employing SystemVerilog or VHDL. Additionally, the project will involve PCB board development and programming using C and Python.

This endeavor takes place within the MEMORIES research group at the Institut Matériaux Microélectronique Nanosciences de Provence (IM2NP), nestled in the captivating city of Marseille, near the beautiful Mediterranean Sea. The group unites researchers and students from diverse backgrounds, fostering an environment of interdisciplinary thinking that thrives on memory device research, from material exploration to system design, encompassing all aspects of testing and characterization. The project will be carried out in close collaboration with the R&D teams at STMicroelectronics. For more technical details regarding this project, we encourage you to reach out to us directly! ….

TYPE OF CONTRACT: TEMPORARY / JOB STATUS: FULL TIME / HOURS PER WEEK: 35
APPLICATION DEADLINE: 01/04/2023
ENVISAGED STARTING DATE: 01/04/2023
ENVISAGED DURATION: 36 months
JOB FUNDED THROUGH AN EU RESEARCH FRAMEWORK PROGRAMME: IPCEI NANO 2026

WORK LOCATION(S): Institut Matériaux Microélecronique et Nanosciences de Provence (IM2NP)
5 rue Enrico Fermi 13013 Marseille, France

WHAT WE OFFER: 

  • Gross Salary starting from 2100 € up to 2300 € 
  • Additional information: The Euraxess Center of Aix-Marseille Université informs foreign visiting professors, researchers, postdoc and PhD candidates about the administrative steps to be undertaken prior to arrival at AMU and the various practical formalities to be completed once in France: visas and entry requirements, insurance, help finding accommodation, support in opening a bank account, etc. More information on AMU EURAXESS Portal 

QUALIFICATIONS, REQUIRED RESEARCH FIELDS, REQUIRED EDUCATION LEVEL, PROFESSIONAL SKILLS, OTHER RESEARCH REQUIREMENTS 
Applicants should possess a general knowledge of electrical engineering and strong analytical skills. While prior experience with full-custom IC design, VHDL, Verilog, or SystemVerilog is highly appreciated, it is not mandatory, as these skills can be acquired during the course of the Ph.D. program. Above all, a passion for designing and creating innovative solutions is essential. Language: English  

Soft skills: Autonomy, Teamwork, Analytical and critical thinking, Listening and observing, Empathy, Flexibility and adaptability, Linguistics, communicative and plurilingual, Cooperation.

REQUESTED DOCUMENTS OF APPLICATION, ELIGIBILITY CRITERIA, SELECTION PROCESS
Please send a curriculum vitae and a cover letter to the contacts.

HOW TO APPLY
jean-michel.portal@univ-amu.frvincenzo.della-marca@univ-amu.frmarc.bocquet@univ-amu.fr 

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Job details

Title
Three-year PhD position in Design and test of ReRAM technology assessment chips
Location
Jardin du Pharo 58, bd Charles Livon Marseille, France
Published
2023-12-07
Application deadline
2024-04-01 23:59 (Europe/Paris)
2024-04-01 23:59 (CET)
Job type
PhD
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